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ELECTROSTATIC DISCHARGE PROTECTION DEVICE FOR A SEMICONDUCTOR DEVICE AND LAYOUT METHOD THEREOF CAPABLE OF INCREASING ELECTROSTATIC DISCHARGE PERFORMANCE
ELECTROSTATIC DISCHARGE PROTECTION DEVICE FOR A SEMICONDUCTOR DEVICE AND LAYOUT METHOD THEREOF CAPABLE OF INCREASING ELECTROSTATIC DISCHARGE PERFORMANCE
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机译:半导体装置的静电放电保护装置及其可提高静电放电性能的布局方法
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摘要
PURPOSE: An electrostatic discharge protection device for a semiconductor device and layout method thereof are provided to deform the drain of an NMOSFET in an LVTSCR(Low Voltage Triggered Silicon Controlled Rectifier) structure, thereby reducing parasitic capacitance. ;CONSTITUTION: An N well region(250) is formed on a semiconductor substrate. A plurality of P well regions(210,220,230,240) is formed on the circumference which forms the N well region. A source region(260) is connected to the P well regions. A drain region(280) is formed on side of the N well region. A gate region(270) is connected to the P well regions.;COPYRIGHT KIPO 2011
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