PHASE SYNCHRONIZING LOOP CIRCUIT CAPABLE OF STABLY DETERMINING A LOCK STATE AND UNLOCK STATE, A LOCK DETECTION METHOD, AND A SYSTEM INCLUDING THE SAME

摘要

PURPOSE: A phase synchronizing loop circuit, a lock detection method, and a system including the same are provided to determine a lock state and unlock state using hysteresis based on a reference value, thereby improving operation stability of circuits.;CONSTITUTION: A phase-frequency detector(100) generates an up or down signal with a pulse width corresponding to a phase difference by comparing a demultiply clock and reference clock. A demultiply device(140) generates the demultiply clock in order to compare the reference clock with an output clock. The phase-frequency detector outputs the up or down signal according to the phase difference between the reference clock and the output clock. A charge pump(110) generates a first control voltage by pumping voltage according to the pulse width of the up signal and down signal. A loop filter(120) generates a second control voltage which is excluding a high frequency element included in the first control voltage. A voltage control oscillator(130) oscillates the output clock of various frequencies. A lock detector(15) comprises an un-lock enable signal generation part and lock enable signal generation part.;COPYRIGHT KIPO 2012