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Semiconductor integrated circuit operation analysis method, operation analysis apparatus, operation analysis program, and operation analysis system
Semiconductor integrated circuit operation analysis method, operation analysis apparatus, operation analysis program, and operation analysis system
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机译:半导体集成电路的动作分析方法,动作分析装置,动作分析程序以及动作分析系统
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摘要
An operation analysis apparatus (100) for a semiconductor integrated circuit according to the present invention includes a simulation analysis unit (140). The simulation analysis unit (140) includes a board and a package from a semiconductor integrated circuit mounted on the board via the package. And a semiconductor characteristic extraction unit (110) that extracts the inductance L, resistance R, and capacitance C of each of the semiconductor integrated circuits, and the semiconductor substrate, package, and semiconductor integration from the extracted inductance L, resistance R, and capacitance C An individual network generation unit (111) that generates an individual network of each circuit, an integrated network generation unit (112) that integrates the generated individual networks and generates an integrated network, and an arbitrary one of the generated integrated networks Insert a noise pattern for verification at the location, and operate the semiconductor integrated circuit. Comprising the simulation execution unit for executing Interview configuration and (113), the.
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