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Semiconductor integrated circuit operation analysis method, operation analysis apparatus, operation analysis program, and operation analysis system

机译:半导体集成电路的动作分析方法,动作分析装置,动作分析程序以及动作分析系统

摘要

An operation analysis apparatus (100) for a semiconductor integrated circuit according to the present invention includes a simulation analysis unit (140). The simulation analysis unit (140) includes a board and a package from a semiconductor integrated circuit mounted on the board via the package. And a semiconductor characteristic extraction unit (110) that extracts the inductance L, resistance R, and capacitance C of each of the semiconductor integrated circuits, and the semiconductor substrate, package, and semiconductor integration from the extracted inductance L, resistance R, and capacitance C An individual network generation unit (111) that generates an individual network of each circuit, an integrated network generation unit (112) that integrates the generated individual networks and generates an integrated network, and an arbitrary one of the generated integrated networks Insert a noise pattern for verification at the location, and operate the semiconductor integrated circuit. Comprising the simulation execution unit for executing Interview configuration and (113), the.
机译:根据本发明的用于半导体集成电路的操作分析装置(100)包括模拟分析单元(140)。仿真分析单元(140)包括板和来自经由封装安装在板上的半导体集成电路的封装。以及半导体特性提取单元(110),其从提取的电感L,电阻R和电容中提取每个半导体集成电路的电感L,电阻R和电容C,以及半导体衬底,封装和半导体集成。 C生成每个电路的单个网络的单个网络生成单元(111),集成生成的单个网络并生成集成网络的集成网络生成单元(112),以及生成的任意一个集成网络插入噪声图案以在该位置进行验证,并操作半导体集成电路。包括用于执行采访配置的模拟执行单元,以及(113)。

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