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NON-VOLATILE MEMORY UNIT CELL WITH IMPROVED SENSING MARGIN AND RELIABILITY

机译:非易失性的记忆单元单元,具有提高的传感裕度和可靠性

摘要

An only-one-polysilicon layer non-volatile memory unit cell includes a first P-type transistor, a second P-type transistor, a N-type transistor pair, a first and second coupling capacitors is provided. The N-type transistor pair has a third transistor and a fourth transistor that are connected. The third transistor and the fourth transistor have a first floating polysilicon gate and a second floating polysilicon gate to serve as charge storage mediums, respectively. One end of the second coupling capacitor is connected to the gate of the second transistor and is coupled to the second floating polysilicon gate, the other end of the second coupling capacitor receives a second control voltage. One end of the second coupling capacitor is connected to the gate of the second transistor and is coupled to the second floating polysilicon gate, the other end of the second coupling capacitor receives a second control voltage.
机译:仅一个多晶硅层非易失性存储单元包括第一P型晶体管,第二P型晶体管,N型晶体管对,第一和第二耦合电容器。 N型晶体管对具有连接的第三晶体管和第四晶体管。第三晶体管和第四晶体管具有分别用作电荷存储介质的第一浮置多晶硅栅极和第二浮置多晶硅栅极。第二耦合电容器的一端连接到第二晶体管的栅极并耦合到第二浮置多晶硅栅极,第二耦合电容器的另一端接收第二控制电压。第二耦合电容器的一端连接到第二晶体管的栅极,并且耦合到第二浮置多晶硅栅极,第二耦合电容器的另一端接收第二控制电压。

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