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FLIP-FLOP LIBRARY DEVELOPMENT FOR HIGH FREQUENCY DESIGNS BUILT IN AN ASIC FLOW

机译:ASIC流程中用于高频设计的FLOP-FLOP库开发

摘要

A method, computer program storage device and system are provided for determination and selection of optimized circuit components. The method includes performing a timing analysis on at least a portion of an electronic circuit and determining a path in the at least a portion of an electronic circuit, where the path comprises at least one storage element and an operational attribute associated with the path. The method also includes determining an optimized storage element adapted to utilize the operational attribute. The system includes a processing device and at least one of a synthesis tool, a timing tool or a place and route tool communicatively connected to the processing device. The synthesis tool, the timing tool and the place and route tool are adapted to process or analyze an electrical circuit. The system also includes a gate library communicatively connected to the at least one of a synthesis tool, a timing tool and a place r route tool, as well as a substitution unit communicatively connected to at least one of the at least one of a synthesis tool, a timing tool or a place and route tool or the gate library. The substitution unit is adapted to substitute an optimized storage element for a storage element in the electrical circuit.
机译:提供了一种用于确定和选择优化的电路组件的方法,计算机程序存储设备和系统。该方法包括对电子电路的至少一部分执行时序分析,并确定电子电路的至少一部分中的路径,其中该路径包括至少一个存储元件和与该路径相关联的操作属性。该方法还包括确定适于利用操作属性的优化的存储元件。该系统包括处理设备以及通信地连接到该处理设备的合成工具,定时工具或布局布线工具中的至少一个。综合工具,计时工具和布局布线工具适用于处理或分析电路。该系统还包括与通信工具,时序工具和布局工具中的至少一个通信连接的门库,以及与通信工具中的至少一个通信中的至少一个通信连接的替代单元。 ,计时工具或布局布线工具或登机库。替换单元适于用优化的存储元件替换电路中的存储元件。

著录项

  • 公开/公告号US2012124543A1

    专利类型

  • 公开/公告日2012-05-17

    原文格式PDF

  • 申请/专利权人 ASWIN K. GUNASEKAR;

    申请/专利号US20100948481

  • 发明设计人 ASWIN K. GUNASEKAR;

    申请日2010-11-17

  • 分类号G06F17/50;

  • 国家 US

  • 入库时间 2022-08-21 17:33:39

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