Low power bit switches and method for high-voltage input SAR ADC

摘要

A switched capacitor circuit, which may be an SAR ADC, includes a plurality of bit switching circuits (33) each including a high-voltage sampling switch circuit (18) having a first terminal (28) coupled to a first terminal of a corresponding capacitor (22) and a second terminal coupled to receive an analog input signal (V_SIG). A third terminal of the sampling switch circuit is coupled to an intermediate conductor (19). Each switching circuit (33) also includes a low-voltage conversion switch circuit (30) coupled to the intermediate conductor (19) and a combinational logic circuit (12) applying low-voltage signals to the conversion switch circuit and a level-shifting circuit (16) that generates corresponding high-voltage signals (HV_SIG_DRV) which control coupling of the first terminal (28) to the analog input signal and the intermediate conductor.