首页>
外国专利>
Methods and apparatus for SRAM bit cell with low standby current, low supply voltage and high speed
Methods and apparatus for SRAM bit cell with low standby current, low supply voltage and high speed
展开▼
机译:具有低待机电流,低电源电压和高速的SRAM位单元的方法和设备
展开▼
页面导航
摘要
著录项
相似文献
摘要
Circuits and methods for providing an SRAM or CAM bit cell. In one embodiment, a bit cell portion with thicker gate oxides in the storage cell transistors, and thinner gate oxides in a read port section having transistors are disclosed. The use of the thick gate oxides in the storage cell transistors provides a stable storage of data and lower standby leakage current. The use of the thinner gate oxides in the read port transistors provides fast read accesses and allows a lower Vcc,min in the read port. The methods used to form the dual gate oxide thickness SRAM cells have process steps compatible with the existing semiconductor manufacturing processes. Embodiments using high k gate dielectrics, dual gate dielectric materials in a single bit cell, and using finFET and planar devices in a bit cell are described. Methods for forming the structures are disclosed.
展开▼