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Techniques for generating PVT compensated phase offset to improve accuracy of a locked loop
Techniques for generating PVT compensated phase offset to improve accuracy of a locked loop
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机译:产生PVT补偿相位偏移以提高锁相环精度的技术
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摘要
A circuit includes a locked loop and a phase offset circuit. The locked loop generates first control signals for controlling a first delay in the locked loop. The phase offset circuit delays an input signal by a second delay that is controlled by second control signals to generate a delayed signal. The phase offset circuit generates the second control signals by adjusting the first control signals to increase the accuracy of the delayed signal with respect to a target phase. The second control signals compensate for at least a portion of a change in the second delay that is caused by a variation in at least one of a process, a supply voltage, and a temperature of the circuit.
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