首页> 外国专利> Multi-cluster dynamic reconfigurable circuit for context valid processing of data by clearing received data with added context change indicative signal

Multi-cluster dynamic reconfigurable circuit for context valid processing of data by clearing received data with added context change indicative signal

机译:多集群动态可重配置电路,用于通过使用添加的上下文变化指示信号清除接收到的数据来对数据进行上下文有效处理

摘要

A dynamic reconfigurable circuit includes multiple clusters each including a group of reconfigurable processing elements. The dynamic reconfigurable circuit is capable of dynamically changing a configuration of the clusters according to a context including a description of processing of the processing elements and of connection between the processing elements. A first cluster among the clusters includes a signal generating circuit that when an instruction to change the context is received, generates a report signal indicative of the instruction to change the context; a signal adding circuit that adds the report signal generated by the signal generating circuit to output data that is to be transmitted from the first cluster to a second cluster; and a data clearing circuit that, when output data to which a report signal generated by the second cluster is added is received, performs a clearing process of clearing the output data received.
机译:动态可重构电路包括多个集群,每个集群包括一组可重构处理元件。动态可重构电路能够根据包括处理元件的处理以及处理元件之间的连接的描述的上下文来动态地改变集群的配置。所述集群中的第一集群包括信号生成电路,该信号生成电路在接收到改变上下文的指令时生成指示该改变上下文的指令的报告信号。信号加法电路,其将由信号生成电路生成的报告信号相加,以将要从第一集群发送到第二集群的数据输出;数据清除电路,当接收到添加了由第二集群生成的报告信号的输出数据时,进行清除接收到的输出数据的清除处理。

著录项

  • 公开/公告号US8171259B2

    专利类型

  • 公开/公告日2012-05-01

    原文格式PDF

  • 申请/专利权人 TAKASHI HANAI;SHINICHI SUTOU;

    申请/专利号US20090394863

  • 发明设计人 TAKASHI HANAI;SHINICHI SUTOU;

    申请日2009-02-27

  • 分类号G06F15/16;

  • 国家 US

  • 入库时间 2022-08-21 17:26:46

相似文献

  • 专利
  • 外文文献
  • 中文文献
获取专利

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号