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Three-dimensional programmable resistance memory device with a read/write circuit stacked under a memory cell array

机译:具有堆叠在存储单元阵列下方的读/写电路的三维可编程电阻存储器件

摘要

A programmable resistance memory device includes a semiconductor substrate, at least one cell array, in which memory cells are arranged formed above the semiconductor substrate. Each of the memory cells has a stack structure of a programmable resistance element and an access element, the programmable resistance element storing a high resistance state or a low resistance state determined due to the polarity of voltage application in a non-volatile manner. The access element has such a resistance value in an off-state in a certain voltage range that is ten time or more as high as that in a select state. A read/write circuit is formed on a semiconductor substrate as underlying the cell array for data reading and data writing in communication with the cell array.
机译:一种可编程电阻存储器件,包括:半导体衬底;至少一个单元阵列;其中,存储单元布置在所述半导体衬底上方。每个存储单元具有可编程电阻元件和存取元件的堆叠结构,该可编程电阻元件以非易失性方式存储由于电压施加的极性而确定的高电阻状态或低电阻状态。存取元件在截止状态下的某个电阻值在某个电压范围内是选择状态下的十倍或更高。读/写电路形成在作为单元阵列下方的半导体衬底上,用于与单元阵列通信的数据读取和数据写入。

著录项

  • 公开/公告号US8102697B2

    专利类型

  • 公开/公告日2012-01-24

    原文格式PDF

  • 申请/专利权人 HARUKI TODA;

    申请/专利号US20100896392

  • 发明设计人 HARUKI TODA;

    申请日2010-10-01

  • 分类号G11C11/00;

  • 国家 US

  • 入库时间 2022-08-21 17:26:33

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