首页> 外国专利> ADDRESS LINE FAULT TREATING APPARATUS, ADDRESS LINE FAULT TREATING METHOD, ADDRESS LINE FAULT TREATING PROGRAM, INFORMATION PROCESSING APPARATUS AND MEMORY CONTROLLER

ADDRESS LINE FAULT TREATING APPARATUS, ADDRESS LINE FAULT TREATING METHOD, ADDRESS LINE FAULT TREATING PROGRAM, INFORMATION PROCESSING APPARATUS AND MEMORY CONTROLLER

机译:地址线故障处理设备,地址线故障处理方法,地址线故障处理程序,信息处理设备和存储器控制器

摘要

An address line substituting circuit (14) in which a branch address line branched off from a lower address line (SA[0] to SA[4]) connected to a lower bit of a memory (6) is connected to an upper address line (SA[5];SA[6]) connected to an upper bit other than the lower bit, and that switches between an input from the upper address line (SA[5];SA[6]) and an input from the branch address line, and outputs any of the inputs to the upper bit is provided. When an address line (A[0] to A[6]) connected to each bit is examined, and a failed address line is specified, the address line substituting circuit (14) is instructed to switch from the upper address line to the branch address line branched off from the failed address line. Thereby, a significant decrease in memory capacity due to memory degeneration can be avoided even when a failure has occurred in an address line of the memory (6).
机译:地址线替换电路(14),其中从连接到存储器(6)的低位的低地址线(SA [0]至SA [4])分支的分支地址线连接到高地址线(SA [5]; SA [6])连接到除低位以外的高位,并在来自高位地址线(SA [5]; SA [6])的输入和来自分支的输入之间切换地址线,并提供任何输入到高位。当检查连接到每个位的地址线(A [0]至A [6]),并且指定了失败的地址线时,指示地址线替换电路(14)从高位地址线切换到分支地址线从故障地址线分支出来。由此,即使在存储器(6)的地址线发生故障的情况下,也能够避免由于存储器退化而导致的存储器容量的大幅度下降。

著录项

  • 公开/公告号EP2077502A4

    专利类型

  • 公开/公告日2012-05-09

    原文格式PDF

  • 申请/专利权人 FUJITSU LIMITED;

    申请/专利号EP20060822527

  • 发明设计人 SUZUKI KENJI;

    申请日2006-10-27

  • 分类号G06F11/20;

  • 国家 EP

  • 入库时间 2022-08-21 17:16:36

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