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SNR IMPROVEMENT CIRCUIT, SYNCHRONIZATION INFORMATION DETECTION CIRCUIT, COMMUNICATION DEVICE, SNR IMPROVEMENT METHOD, AND SYNCHRONIZATION INFORMATION DETECTION METHOD
SNR IMPROVEMENT CIRCUIT, SYNCHRONIZATION INFORMATION DETECTION CIRCUIT, COMMUNICATION DEVICE, SNR IMPROVEMENT METHOD, AND SYNCHRONIZATION INFORMATION DETECTION METHOD
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机译:SNR改善电路,同步信息检测电路,通信设备,SNR改善方法和同步信息检测方法
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摘要
Provided is a technique that can, e.g., improve the packet catch rate when applied to a communication device. An SNR improvement circuit (4) for improving the SNR of an input signal includes a delay unit (50) for delaying the input signal and generating one or more delay signals, and an adder (60) for adding the one or more delay signals and the pre-delayed input signal. The input signal includes a period signal in which the same signal is repeated a predetermined number of times at a predetermined period. The delay unit (50) generates the one or more delay signals with a delay time that is α-fold the length of the predetermined period (where α is a natural number and is set to different values for two or more delay signals).
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