Device memory, hardware entities, sub-image cell values, the device comprising a cache and write cache operator is provided. At least some of the hardware entities perform operations comprising the use of a memory access to the device and the device memory. Hardware entities, and a circuit for processing 3D graphics 3D image from a primitive objects ready for display. The cache memory device and is separate from, the buffered sub-image is provided to maintain the data including the cell value. Cache, the device memory sub-pixel processing of the image in the name of the direct access to the cell values, 3D pixels of the graphics processing circuit are buffered in the cache sub-images is connected to the 3D graphics circuit to gain access to the cell values. The operator is written under the direction of the buffered system priority sub-image sub-image is written to the device memory. Priority scheme and stores the value in contact with the boundary cells of one or more primitive objects in the cache.
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