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SEMICONDUCTOR MEMORY DEVICE, A TEST CIRCUIT, AND A TESTING METHOD CAPABLE OF TRANSMITTING DATA TO GIO LINES AT THE SAME TIME
SEMICONDUCTOR MEMORY DEVICE, A TEST CIRCUIT, AND A TESTING METHOD CAPABLE OF TRANSMITTING DATA TO GIO LINES AT THE SAME TIME
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机译:半导体存储器,测试电路以及能够同时将数据传输到GIO线路的测试方法
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摘要
PURPOSE: A semiconductor memory device, a test circuit, and a testing method are provided to minimize the test time of a plurality of unit cells by comparing the data of two GIO lines and outputting a fail signal.;CONSTITUTION: A path selecting unit transmits a first data inputted through a first data pad to a first memory cell and a second memory cell in a test mode. A test mode control unit(200) controls one of a plurality of first data pads to show a fail state according to the comparison result by comparing the first data of the first and second memory cells. The test mode control unit controls one of the first data pads to show a high impedance state in a read operation when a fail state is generated. A fail sensing unit outputs a fail sensing signal by comparing the first data of the first memory cell with the first data of the second memory cell.;COPYRIGHT KIPO 2012
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