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EDGE COMBINER CAPABLE OF OBTAINING IMPROVED PERFORMANCE USING AN IMPROVED STRUCTURE AND A FREQUENCY MULTIPLIER AND A FREQUENCY MULTIPLYING METHOD USING THE EDGE COMBINER
EDGE COMBINER CAPABLE OF OBTAINING IMPROVED PERFORMANCE USING AN IMPROVED STRUCTURE AND A FREQUENCY MULTIPLIER AND A FREQUENCY MULTIPLYING METHOD USING THE EDGE COMBINER
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机译:使用改进的结构和频率乘法器可获得改善性能的EDGE合并器以及使用EDGE合并器的频率乘法方法
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摘要
PURPOSE: An edge combiner and a frequency multiplier and a frequency multiplying method using the edge combiner are provided to be operated at high speed by controlling a turn-off operation of a PMOS transistor in a differential cascode voltage switch logic through a separate control unit.;CONSTITUTION: A first signal output part(510) includes a first control part and a second control part which respectively control turn-off operations of a first PMOS(P-channel Metal Oxide Semiconductor) transistor and a second PMOS transistor in a differential cascode voltage switch logic. A second signal output part(520) controls a duty ratio of signals by toggling each output signal of the first signal output part. The first control part comprises a first inverter, a first NMOS(N-channel Metal Oxide Semiconductor) passgate, and a first shut off PMOS transistor. Drain terminals of the first shut off PMOS transistor and the first NMOS passgate are connected to the first PMOS transistor. The second controller comprises a second inverter, a second NMOS passgate, and a second shut off PMOS transistor.;COPYRIGHT KIPO 2012
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