SYNCHRONOUS DATA PROCESSING SYSTEM AND A SYNCHRONOUS DATA PROCESSING METHOD FOR IMPROVING THE RELIABILITY OF DATA TRANSMISSION

摘要

PURPOSE: A synchronous data processing system and a synchronous data processing method are provided to improve setup and retention time for a writing operation by using an inverted clock in a memory module for sampling writing data.;CONSTITUTION: A memory controller(74) is connected to a memory module. A clock inverter(76) receives an input clock signal and transmits an inverted clock signal to the memory module. A writing data buffer(84) is connected to the memory module and transmits data to the memory module in response to an input clock signal. An asynchronous first-in-first-out buffer(86) reads data from the memory module in response to a feedback signal by feeding back a memory clock signal to the asynchronous first-in-out buffer.;COPYRIGHT KIPO 2013;[Reference numerals] (72) Memory module; (74) Memory controller; (78) CLK_INT; (80) CLK_OUT; (82) MEM_CLK; (84) Writing data buffer; (86) ASTNCFIFO buffer; (88) CLK_IN; (90) Detector; (92) Data sampling module; (AA) IP_CLK; (BB) IP_DATA; (CC) MEM_DATA