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A processor with a dependency mechanism that predicts whether a read depends on a previous write
A processor with a dependency mechanism that predicts whether a read depends on a previous write
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机译:一种具有依赖性机制的处理器,该机制可预测读取是否依赖于先前的写入
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摘要
A processor may include a scheduler configured to issue operations and a load store unit configured to execute memory operations issued by the scheduler. The load store unit is configured to store information identifying memory operations issued to the load store unit. In response to detection of incorrect data speculation for one of the issued memory operations, the load store unit is configured to replay at least one of the issued memory operations by providing an indication to the scheduler. The scheduler is configured to responsively reissue the memory operations identified by the load store unit.
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