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DEFECT ANALYZING METHOD, DEFECT ANALYZING DEVICE AND DEFECT ANALYZING PROGRAM FOR SEMICONDUCTOR DEVICES

机译:半导体器件的缺陷分析方法,缺陷分析装置和缺陷分析程序

摘要

PROBLEM TO BE SOLVED: To provide a defect analyzing technique for semiconductor devices that enables the analysis success rate to be enhanced and the time taken by the analysis to be shortened.;SOLUTION: One of specific wiring lines that is presumed to be short-circuited is specified (S103); adjoining wiring lines presumed to be partners to the short circuiting are extracted (S104); a different voltage time zone in which the voltage state (logic state) differs between the two wiring lines is calculated (S107); and, by investigating the frequency of light emitting phenomena occurring in the different voltage time zone, the particular one of the adjoining wiring lines which is the partner to the short circuiting is definitely identified to the one of specific wiring lines in a short period of time.;COPYRIGHT: (C)2013,JPO&INPIT
机译:解决的问题:为半导体器件提供一种缺陷分析技术,该技术可以提高分析成功率,并缩短分析所需的时间。解决方案:被认为是短路的特定布线之一被指定(S103);提取被认为是短路伴侣的相邻布线(S104);计算两条配线之间的电压状态(逻辑状态)不同的不同的电压时区(S107);并且,通过调查在不同的电压时域中发生的发光现象的频率,可以在短时间内将特定的相邻的布线之一明确地识别为短路的伙伴之一。 。;版权:(C)2013,JPO&INPIT

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