Being the maruchipoto memory device null maruchipoto memory

摘要

Can operate at a different speed of each port, two or multi-port memory device with more ports (110) is a (100). Multi-port memory device includes a memory bank that can be accessed via a port of two or more. Two clock signals, ie system clock port clock (SCK) and is (PCK), is applied to each port. All of the port to operate at the speed of common to the memory bank and apply it to (220) logical ports to be connected to the memory bank the system clock. The applied clock divider circuit port clock is associated with each port (230). Port clock is held to the original frequency, or is divided into a desired frequency. This arrangement makes it possible to operate at different speeds port can be set for each port. [Selection Figure Figure 2