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Test Pad Structure, A Pad Structure For Inspecting A Semiconductor Chip And A Wiring Substrate For A Tape Package Having The Same
Test Pad Structure, A Pad Structure For Inspecting A Semiconductor Chip And A Wiring Substrate For A Tape Package Having The Same
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机译:测试焊盘结构,用于检查半导体芯片的焊盘结构以及用于具有该焊盘结构的带封装的布线基板
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摘要
A test pad structure may include a plurality of test pads and a plurality of connection leads. A plurality of the test pads may be sequentially arranged from a wiring pattern on a substrate and arranged in rows parallel with one another. The plurality of the test pads may include a first group of test pads having at least one pad and a second group of test pads having at least two pads. A plurality of the connection leads may extend from end portions of the wiring pattern to be connected to the plurality of test pads. A plurality of the connection leads may include at least one inner lead passing between the at least two pads of the second group of the test pads and arranged in a first row closest to the first group of the test pads. The at least one inner lead may be connected to at least one pad of the at least two pads of the second group of the test pads arranged in a second row next to the first row.
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