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Method and system for generating partitioned matrices for parallel circuit simulation

机译:生成用于并行电路仿真的分区矩阵的方法和系统

摘要

Over the years, parallel processing has become increasingly common. Conventional circuit simulators have not taken full advantage of these developments, however. Here, a circuit simulator and system are provided that partitions circuit matrices to allow for more efficient parallel processing to take place. By doing this, the overall speed and reliability of the circuit simulator can be increased.
机译:多年来,并行处理已变得越来越普遍。然而,常规电路仿真器没有充分利用这些发展。在此,提供了电路模拟器和系统,其划分电路矩阵以允许进行更有效的并行处理。通过这样做,可以提高电路模拟器的整体速度和可靠性。

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