首页>
外国专利>
Matrix multiplication operations with data pre-conditioning in a high performance computing architecture
Matrix multiplication operations with data pre-conditioning in a high performance computing architecture
展开▼
机译:高性能计算架构中具有数据预处理的矩阵乘法运算
展开▼
页面导航
摘要
著录项
相似文献
摘要
Mechanisms for performing matrix multiplication operations with data pre-conditioning in a high performance computing architecture are provided. A vector load operation is performed to load a first vector operand of the matrix multiplication operation to a first target vector register. A load and splat operation is performed to load an element of a second vector operand and replicating the element to each of a plurality of elements of a second target vector register. A multiply add operation is performed on elements of the first target vector register and elements of the second target vector register to generate a partial product of the matrix multiplication operation. The partial product of the matrix multiplication operation is accumulated with other partial products of the matrix multiplication operation.
展开▼