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Locally synchronous shared BIST architecture for testing embedded memories with asynchronous interfaces
Locally synchronous shared BIST architecture for testing embedded memories with asynchronous interfaces
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机译:本地同步共享BIST体系结构,用于通过异步接口测试嵌入式存储器
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摘要
A system and method of sharing testing components for multiple embedded memories and the memory system incorporating the same are disclosed. The memory system includes multiple test controllers, multiple interface devices, a main controller, and a serial interface. The main controller is used for initializing testing of each of the dissimilar memory groups using a serial interface and local test controllers. The memory system results in reduced routing congestion and faster testing of plurality of dissimilar memories. The present disclosure further provides a programmable shared built in self-testing (BIST) architecture utilizing globally asynchronous and locally synchronous (GALS) methodology for testing multiple memories. The built in self-test (BIST) architecture includes a programmable master controller, multiple memory wrappers, and an interface. The interface can be a globally asynchronous and locally synchronous (GALS) interface.
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