A SYSTEM FOR DERIVING DESIRED CLOCK FREQUENCY FROM GIVEN REFERENCE CLOCK FREQUENCY SOURCE, TO DEVELOP A SUBSYSTEM FUNCTIONAL MODEL IN DIGITAL ELECTRONICS APPLICATIONS AND A METHOD THEREOF

摘要

The said invention is used for obtaining a hardware-model where an input free running square waveform function of a known frequency is divided by a factor of an integer and/or a fraction to obtain square like function signal with a frequency that is close to a desired one. The method makes use of an algorithm of exhaustive computations in order to combine/cascading predetermined digital circuits as building blocks to form a model of a digital circuit that divides the input clock frequency and gives the output with frequency close to desired. The resulted outcome is a circuit description that is automatically modeled using hardware description language like VHDL/Verilog by the said system and thus it helps in reducing the development time substantially by achieving increased accuracy for developing applications in digital electronics.