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DATA HIERARCHY LAYOUT CORRECTION AND VERIFICATION METHOD AND APPARATUS

机译:数据层次布局校正和验证方法及装置

摘要

A method and apparatus for the correction of integrated circuit layouts for optical proximity effects which maintains the original true hierarchy of the original layout is provided. Also provided is a method and apparatus for the design rule checking of layouts which have been corrected for optical proximity effects. The OPC correction method comprises providing a hierarchically described integrated circuit layout as a first input (205), and a particular set of OPC correction criteria as a second input (260). The integrated circuit layout is then analyzed to identify features of the layout which meet the provided OPC correction criteria (210, 240). After the areas on the mask which need correction have been identified (310), optical proximity correction data (320) is generated in response to the particular set of correction criteria. Finally, a first program data is generated which stores the generated optical proximity correction data in a hierarchical structure (320) that corresponds to the hierarchical structure of the integrated circuit layout (310). As the output correction data is maintained in true hierarchical format, layouts which are OPC corrected according to this method are able to be processed through conventional design rule checkers with no altering of the data.
机译:提供了一种用于校正集成电路布局以实现光学邻近效应的方法和装置,该方法和设备保持了原始布局的原始真实等级。还提供了一种方法和装置,用于对已经针对光学邻近效应进行校正的布局的设计规则检查。 OPC校正方法包括提供分层描述的集成电路布局作为第一输入(205),以及特定组的OPC校正标准作为第二输入(260)。然后分析集成电路布局以识别满足所提供的OPC校正标准的布局特征(210、240)。在已经识别出掩模上的需要校正的区域之后(310),响应于特定的校正标准集合而生成光学邻近校正数据(320)。最后,生成第一程序数据,该第一程序数据将所生成的光学邻近校正数据存储在与集成电路布局(310)的分层结构相对应的分层结构(320)中。由于将输出校正数据保持为真实的分层格式,因此可以通过常规设计规则检查器处理根据此方法进行OPC校正的布局,而无需更改数据。

著录项

  • 公开/公告号EP1023640B1

    专利类型

  • 公开/公告日2013-07-03

    原文格式PDF

  • 申请/专利权人 SYNOPSYS INC;

    申请/专利号EP19980947104

  • 申请日1998-09-17

  • 分类号G03F1/36;

  • 国家 EP

  • 入库时间 2022-08-21 16:35:50

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