SEMICONDUCTOR PACKAGE AND A MANUFACTURING METHOD THEREOF CAPABLE OF REDUCING THE INFLUENCE OF SIGNAL INTERFERENCE DUE TO A COUPLING EFFECT

摘要

PURPOSE: A semiconductor package and a manufacturing method thereof are provided to prevent the malfunction of a semiconductor chip by including a package cap which is electrically connected to a ground layer of a package substrate to block electromagnetic waves.;CONSTITUTION: A package substrate(200) includes a chip mounting region and a peripheral region. A ground layer(206) is formed in the peripheral region. A first solder ball(10) is formed in the chip mounting region. A second solder ball(20) is formed in the peripheral region. A semiconductor chip(300) is mounted in the chip mounting region. A package cap(400) covers the semiconductor chip. The package cap is electrically connected to the ground layer formed in the peripheral region.;COPYRIGHT KIPO 2013