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SEMICONDUCTOR DEFECT INTEGRATED PROJECTION METHOD AND DEFECT INSPECTION SUPPORT APPARATUS EQUIPPED WITH SEMICONDUCTOR DEFECT INTEGRATED PROJECTION FUNCTION
SEMICONDUCTOR DEFECT INTEGRATED PROJECTION METHOD AND DEFECT INSPECTION SUPPORT APPARATUS EQUIPPED WITH SEMICONDUCTOR DEFECT INTEGRATED PROJECTION FUNCTION
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机译:半导体缺陷集成投影功能的半导体缺陷集成投影方法和缺陷检查支持装置
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摘要
The present invention comprises: a design layout data read part that acquires design layout data including location information of design circuit patterns used in steps of semiconductor fabrication; a wafer-chip information read part that acquires, from among data concerning a wafer on which a plurality of the design circuit patterns are formed per chip, wafer-chip information including at least design cell location information; a defect data read part that acquires defect data including location information of defects that occurred in the steps; a design layout data tracing processing part that creates a design layout data defect integrated projection display view by performing, based on the design layout data and the wafer-chip information, an integrated projection process on, among the design layout data, design layout data for a step in which a defect occurred and the defect data; and a defect integrated projection display apparatus that displays the design layout data defect integrated projection display view.
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