首页> 外国专利> SEMICONDUCTOR DEFECT INTEGRATED PROJECTION METHOD AND DEFECT INSPECTION SUPPORT APPARATUS EQUIPPED WITH SEMICONDUCTOR DEFECT INTEGRATED PROJECTION FUNCTION

SEMICONDUCTOR DEFECT INTEGRATED PROJECTION METHOD AND DEFECT INSPECTION SUPPORT APPARATUS EQUIPPED WITH SEMICONDUCTOR DEFECT INTEGRATED PROJECTION FUNCTION

机译:半导体缺陷集成投影功能的半导体缺陷集成投影方​​法和缺陷检查支持装置

摘要

The present invention comprises: a design layout data read part that acquires design layout data including location information of design circuit patterns used in steps of semiconductor fabrication; a wafer-chip information read part that acquires, from among data concerning a wafer on which a plurality of the design circuit patterns are formed per chip, wafer-chip information including at least design cell location information; a defect data read part that acquires defect data including location information of defects that occurred in the steps; a design layout data tracing processing part that creates a design layout data defect integrated projection display view by performing, based on the design layout data and the wafer-chip information, an integrated projection process on, among the design layout data, design layout data for a step in which a defect occurred and the defect data; and a defect integrated projection display apparatus that displays the design layout data defect integrated projection display view.
机译:本发明包括:设计布局数据读取部件,其获取包括在半导体制造步骤中使用的设计电路图案的位置信息的设计布局数据;以及晶片芯片信息读取部,该晶片芯片信息读取部从与每个芯片上形成有多个设计电路图案的晶片有关的数据中获取至少包括设计单元位置信息的晶片芯片信息。缺陷数据读取部分,获取包括在步骤中发生的缺陷的位置信息的缺陷数据;设计布局数据跟踪处理部分,其通过基于设计布局数据和晶片芯片信息对设计布局数据中的设计布局数据执行集成投影处理来创建设计布局数据缺陷集成投影显示视图,缺陷发生的步骤和缺陷数据;缺陷综合投影显示装置,其显示设计版面数据缺陷综合投影显示图。

著录项

  • 公开/公告号KR101324349B1

    专利类型

  • 公开/公告日2013-10-31

    原文格式PDF

  • 申请/专利权人

    申请/专利号KR20117018136

  • 申请日2010-02-01

  • 分类号H01L21/66;G01N21/956;G06T1;

  • 国家 KR

  • 入库时间 2022-08-21 16:24:11

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