首页> 外国专利> Reduction of the threshold value voltage fluctuation in transistors with a channel half conductor alloy by reducing the separating speeds unequal to moderately

Reduction of the threshold value voltage fluctuation in transistors with a channel half conductor alloy by reducing the separating speeds unequal to moderately

机译:通过降低不相等的分离速度,降低带有沟道半导体合金的晶体管的阈值电压波动

摘要

A method with:Forming a threshold value - adjusting semiconductor material (209) on a first and a second silicon - containing semiconductor region (203a, 203b);Introducing a dopant locations in the second silicon - containing semiconductor region (203b) by the use of an implantation mask (214b), which the first silicon - containing semiconductor region (203a) covers;Removal of the threshold value - adjusting semiconductor material (209) selectively from the second silicon - containing semiconductor region (203b) by forming a mask layer (205), structuring of the mask layer (205) using the said implantation mask (214b) and etching through the threshold value - adjusting semiconductor material (209) with the use of the structured mask layer as an etching mask (205); andForming a first gate - electrode structure of a first transistor to the threshold value - adjusting semiconductor material (209) and a second gate - electrode structure of a second transistor on the second silicon - containing semiconductor region (203b), wherein the first and second gate - electrode structure a dielectric material with a large ε and a metal - containing electrode material, which in the dielectric material is formed with a large ε.
机译:一种方法,其具有:在第一和第二含硅半导体区域(203a,203b)上形成阈值-调节半导体材料(209);通过使用在第二含硅半导体区域(203b)中引入掺杂剂位置。包含第一含硅半导体区域(203a)的注入掩模(214b);通过形成掩模层从第二含硅半导体区域(203b)选择性地去除阈值-调整半导体材料(209) (205),使用所述注入掩模(214b)对掩模层(205)进行结构化,并通过阈值进行蚀刻,并使用结构化的掩模层作为蚀刻掩模(205)来调整半导体材料(209);在所述第二含硅半导体区域(203b)上,将第一晶体管的第一栅极-电极结构形成为阈值-调节半导体材料(209)和第二晶体管的第二栅极-电极结构,其中,所述第一和第二栅电极结构是具有较大ε的介电材料和含金属的电极材料,后者在介电材料中具有较大的ε。

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