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Method for manufacturing integrated circuit for e.g. P-channel complementary MOS transistor, involves producing recess in active region by etching process, and forming semiconductor alloy by performing epitaxial growth process
Method for manufacturing integrated circuit for e.g. P-channel complementary MOS transistor, involves producing recess in active region by etching process, and forming semiconductor alloy by performing epitaxial growth process
The method involves forming a buried etch stop layer (210a) in a crystalline active region of a transistor e.g. P-channel complementary MOS (CMOS) transistor. A recess is produced in the crystalline active region by carrying-out an etching process e.g. wet-chemical etching process, where the recess possesses a crystallographic anisotropic ablation rate during part of the etching process. The buried etch stop layer is used as an etch stop. A deformation-inducing semiconductor alloy is formed in the recess by performing a selective epitaxial growth process. An independent claim is also included for a semiconductor component.
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