首页> 外国专利> Integrated circuit, has source and/or drain regions separated from substrate region by another substrate region located under spacing region while latter substrate region has same conductivity type as that of former substrate region

Integrated circuit, has source and/or drain regions separated from substrate region by another substrate region located under spacing region while latter substrate region has same conductivity type as that of former substrate region

机译:集成电路具有通过位于间隔区域下方的另一个衬底区域而与衬底区域隔开的源极和/或漏极区域,而后一个衬底区域具有与前一个衬底区域相同的导电类型

摘要

The circuit has a metal oxide semiconductor (MOS) transistor (TR) including a substrate (SUB), a source region (S), a drain region (D), a gate region (G) and insulating spacing regions (ESP) on sides of the gate region. The substrate comprises a region (RC) located under the gate region between the insulating spacing regions. The source region or drain region is separated from the region of the substrate by another region (RSEP) of the substrate located under one of the spacing regions while the latter region has same conductivity type as that of the former region. An independent claim is also included for a method for producing a MOS transistor.
机译:该电路具有金属氧化物半导体(MOS)晶体管(TR),其侧面包括衬底(SUB),源极区(S),漏极区(D),栅极区(G)和绝缘间隔区(ESP)门区域。衬底包括位于绝缘间隔区域之间的栅极区域下方的区域(RC)。源区或漏区通过位于间隔区中的一个下方的衬底的另一区域(RSEP)与衬底的区域分开,而后一个区域具有与前一个区域相同的导电类型。还包括用于制造MOS晶体管的方法的独立权利要求。

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