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Integrated circuit, has source and/or drain regions separated from substrate region by another substrate region located under spacing region while latter substrate region has same conductivity type as that of former substrate region
Integrated circuit, has source and/or drain regions separated from substrate region by another substrate region located under spacing region while latter substrate region has same conductivity type as that of former substrate region
The circuit has a metal oxide semiconductor (MOS) transistor (TR) including a substrate (SUB), a source region (S), a drain region (D), a gate region (G) and insulating spacing regions (ESP) on sides of the gate region. The substrate comprises a region (RC) located under the gate region between the insulating spacing regions. The source region or drain region is separated from the region of the substrate by another region (RSEP) of the substrate located under one of the spacing regions while the latter region has same conductivity type as that of the former region. An independent claim is also included for a method for producing a MOS transistor.
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