Circuit supplying two clock frequencies, while changing from one frequency to the other does not supply a clock signal.

摘要

Disclosed is a circuit arrangement with two clock sources and circuitry configured to supply a clock signal to an associated circuit. The circuitry is configured to change the clock signal from one frequency to another frequency such that no clock signal is supplied when changing the frequencies. The first source may be an oscillator, and the second may be a phase lock loop, which may setup to attain lock when the clock signal from the first clock source is being supplied. The circuit arrangement may have delay locked loop circuitry to provide a controllable delay. The associated circuit may have a plurality of taps, such that the selection of the taps determines the period for which the clock is not supplied and/or the time taken to change the supplied clock frequency. The circuit arrangement may be consist of a pair of dies, the first die having a processor and the second having a memory that stores boot data for the processor.