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Non- c- plane (Al, Ga, In) with silicon (Si) doped for the suppression of tilt defect formation and the critical thickness increased

机译:掺杂硅(Si)的非c平面(Al,Ga,In)可抑制倾斜缺陷的形成,并且可增加临界厚度

摘要

A method of fabricating a Group III nitride semiconductor device , the method , there is provided by growing a (a) a semi- polar or nonpolar GaN substrate or one or more buffer layers on the upper side , the buffer layer is a semi-polar or non-polar group III nitride buffer layer , and that , the number of crystal defects in the Group III nitride device layer to be formed on or above the (b) doped buffer layer , one as not higher than the number of crystal defects in the III -nitride device layer to be formed over the doped with a buffer layer or above that does not , and a to doped buffer layer . Be doped , can reduce or prevent the formation of misfit dislocations and additional threading dislocations . The thickness and / or composition of the buffer layer , the buffer layer , may be one such as those having a larger thickness or close to the critical thickness for relaxation .
机译:一种制造III族氮化物半导体器件的方法,该方法通过在上侧生长(a)半极性或非极性GaN衬底或一个或多个缓冲层来提供,该缓冲层是半极性的或非极性III族氮化物缓冲层,并且,在(b)掺杂缓冲层上或之上形成的III族氮化物器件层中的晶体缺陷数,不大于Si中的晶体缺陷数。 III氮化物器件层将形成在掺杂缓冲层之上或之上,并没有掺杂层和掺杂缓冲层。被掺杂,可以减少或防止错配位错和其他螺纹位错的形成。缓冲层,缓冲层的厚度和/或组成可以是诸如具有更大厚度或接近于松弛的临界厚度的那些。

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