首页> 外国专利> Situ low dielectric constant capping to improve the resistance to integrated damaging

Situ low dielectric constant capping to improve the resistance to integrated damaging

机译:原位低介电常数上限,以提高抵抗综合破坏的能力

摘要

Method and apparatus for forming a low dielectric constant dielectric layer containing voids is provided. In one embodiment, a method for processing a substrate is provided. And placing the substrate within the processing region, the organosilicon compound and reacting in the presence of plasma porogen provides precursor oxide gas, silicon, oxygen, and this method is low porogen containing carbon on a substrate the method comprising depositing a dielectric constant dielectric layer, and the silicon, oxygen, and depositing a porous dielectric capping layer containing carbon porogen containing low k dielectric layer, and a porogen containing low k dielectric layer UV by (UV) curing the porous dielectric capping layer, removing at least a portion of the porogen from the porogen-containing low-k dielectric layer through the porous dielectric capping layer, a gap, the porogen-containing low k dielectric layer and a, and be converted to porous low-k dielectric layer having.
机译:提供了用于形成包含空隙的低介电常数介电层的方法和设备。在一个实施例中,提供了一种用于处理基板的方法。并将基板置于处理区域内,有机硅化合物在等离子体致孔剂的存在下进行反应,可提供前驱体氧化物气体,硅,氧,并且该方法是在基板上含低致孔剂的碳,该方法包括沉积介电常数电介质层,硅,氧,并通过(UV)固化多孔介电盖层,沉积至少一部分致孔剂,并沉积含碳致孔剂的低介电层的多孔介电盖层和含低k介电层的致孔剂,从含致孔剂的低k介电层到多孔介电覆盖层,间隙,含致孔剂的低k介电层和a,并转换成具有多孔性的低k介电层。

著录项

相似文献

  • 专利
  • 外文文献
  • 中文文献
获取专利

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号