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SYSTEM AND METHOD FOR FILTRATION OF ERROR REPORTS RESPECTIVE OF STATIC AND QUASI-STATIC SIGNALS WITHIN AN INTEGRATED CIRCUIT DESIGN

机译:在集成电路设计中用于过滤表示静态和准静态信号的错误报告的系统和方法

摘要

A system and method identify potentially static and/or quasi-static signals within an integrated circuit (IC), or portion thereof. Static and quasi-static signals may be identified in a design description of the IC by any one or more of: (1) a fan-out size exceeding some threshold, (2) a toggle frequency in a simulation trace that is below some threshold, and (3) a signal name that appears in a list accessed from the memory. Identification of static and quasi-static signals is performed, typically, as part of a verification process in order to flag cases where the verification system would otherwise indicate an error (e.g., at a clock domain crossing). Identifying a signal of the IC as being static or quasi-static improves the quality of results of verification and makes it easier for a prospective user to concentrate on actual rather than spurious issues reported during verification.
机译:一种系统和方法识别集成电路(IC)或其一部分内的潜在静态和/或准静态信号。可以通过以下任何一种或多种方式在IC的设计说明中识别静态和准静态信号:(1)扇出尺寸超过某个阈值,(2)仿真轨迹中的触发频率低于某个阈值,以及(3)出现在从内存访问的列表中的信号名称。通常,作为验证过程的一部分,进行静态和准静态信号的识别,以标记验证系统否则将指示错误的情况(例如,在时钟域交叉时)。将IC的信号识别为静态或准静态可提高验证结果的质量,并使准用户更容易专注于验证过程中报告的实际问题而非虚假问题。

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