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SYSTEMS AND METHODS FOR ERASING CHARGE-TRAP FLASH MEMORY
SYSTEMS AND METHODS FOR ERASING CHARGE-TRAP FLASH MEMORY
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机译:用于擦除电荷陷阱闪存的系统和方法
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摘要
FLASH memory device contains at least one memory stack. The stack of transistors includes a first (or source) selector transistor, a second (or drain) selector transistor, and a plurality memory cell transistors connected in series therebetween. During an erase operation, each of the first and second selector transistors has a bias applied that releases the select transistors from an electrically floating state together with biasing each of the memory cell transistors.
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