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TIMING BOTTLENECK ANALYSIS ACROSS PIPELINES TO GUIDE OPTIMIZATION WITH USEFUL SKEW
TIMING BOTTLENECK ANALYSIS ACROSS PIPELINES TO GUIDE OPTIMIZATION WITH USEFUL SKEW
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机译:沿管道对Botneteck分析进行优化,以指导使用优化的偏斜优化
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摘要
Techniques and systems for guiding circuit optimization are described. Some embodiments compute a set of aggregate slacks for a set of chains of logic paths in a circuit design. Each chain of logic paths starts from a primary input or a sequential circuit element that only launches a signal but does not capture a signal and ends at a primary output or a sequential circuit element that only captures a signal but does not launch a signal. Next, the embodiments guide circuit optimization of the circuit design based on the set of aggregate slacks.
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