IMPLEMENTING DRAM FAILURE SCENARIOS MITIGATION BY USING BUFFER TECHNIQUES DELAYING USAGE OF RAS FEATURES IN COMPUTER SYSTEMS

摘要

A method, system and computer program product are provided for implementing dynamic random access memory (DRAM) failure scenarios mitigation using buffer techniques delaying usage of RAS features in computer systems. A buffer is provided with a memory controller. Physical address data read/write failures are analyzed. Responsive to identifying predefined failure types for physical address data read/write failures, the buffer is used to selectively store and retrieve data.