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RISC processor with instruction executing on different size operand and prefix instruction identifying select flag update for respective size
RISC processor with instruction executing on different size operand and prefix instruction identifying select flag update for respective size
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机译:RISC处理器,其指令在不同大小的操作数上执行,并且前缀指令标识相应大小的选择标志更新
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摘要
A RISC data processor in which the number of flags generated by each instruction is increased so that a decrease of flag-generating instructions exceeds an increase of flag-using instructions in quantity, thereby achieving the decrease in instructions. An instruction for generating flags according to operands' data sizes is defined, and an instruction set handled by the RISC data processor includes an instruction capable of executing an operation on operands in more than one data size. An identical operation process is conducted on the small-size operand and on low-order bits of the large-size operand, and flags are generated capable of coping with the respective data sizes regardless of the data size of each operand subjected to the operation. Thus, a reduction in instruction code space of the RISC data processor can be achieved.
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