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Testing system for integrated circuits including components for receiving clock signals corresponding to different clock domains
Testing system for integrated circuits including components for receiving clock signals corresponding to different clock domains
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机译:集成电路的测试系统,包括用于接收对应于不同时钟域的时钟信号的组件
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摘要
A system for testing an integrated circuit including components for receiving clock signals corresponding to different clock domains includes a pin of the integrated circuit to receive a test clock signal for components included in different clock domains, clock gating cells integrated in the integrated circuit to direct said test clock signal from the pin towards components included in respective clock domains and, coupled to each of the gating cells, a dedicated flip-flop for a respective clock domain, the dedicated flip-flop being also integrated in the integrated circuit to effect on the cell to which it is coupled a clock gating function during testing of the integrated circuit.
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