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Distributed LC resonant tanks clock tree synthesis
Distributed LC resonant tanks clock tree synthesis
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机译:分布式LC谐振回路时钟树综合
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摘要
A technique for implementing an clock tree distribution network having a clock buffer and a plurality of LC tanks that each take into consideration local capacitance distributions and conductor resistances. An AC-based sizing formulation is applied to the buffer and to the LC tanks so as to reduce the total buffer area. The technique is iterative and can be fully automated while also reducing clock distribution power consumption.
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