SUCCESSIVE APPROXIMATION ANALOG-TO-DIGITAL CONVERTER USING CAPACITOR ARRAY WITH SUB-CAPACITORS CONFIGURED BY CAPACITOR DISASSEMBLING AND RELATED METHOD THEREOF

摘要

A successive approximation analog-to-digital converter (SAR ADC) includes a capacitor array and a comparator. The capacitor array has M capacitors which are arranged to perform capacitor switching operations sequentially, wherein a sum of capacitance values of the M capacitors is equal to (2^N−1) unit capacitors, MN, and M and N are both positive integers. The comparator is arranged for comparing an output of the capacitor array and an analog input sequentially.