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Methods of forming integrated circuit devices using modified rectangular mask patterns to increase reliability of contacts to electrically conductive lines

机译:使用改进的矩形掩模图案形成集成电路器件以增加与导电线的接触的可靠性的方法

摘要

Methods of forming integrated circuit devices include forming first and second electrically conductive lines at side-by-side locations on an integrated circuit substrate. Steps are performed to selectively etch each of the first and second electrically conductive lines into a respective pair of interconnects having facing ends that are separated from each other. This selective etching step is performed using a photolithography mask having a modified-rectangular mask pattern thereon, which is configured to define a shape of the facing ends of each of the pair of interconnects.
机译:形成集成电路器件的方法包括在集成电路衬底上的并排位置处形成第一和第二导电线。执行步骤以将第一和第二导电线中的每条选择性地蚀刻到具有彼此分离的相对端的相应的一对互连中。使用其上具有修改后的矩形掩模图案的光刻掩模来执行该选择性蚀刻步骤,该光刻掩模被配置为限定一对互连中的每对的相对端的形状。

著录项

  • 公开/公告号US8796134B2

    专利类型

  • 公开/公告日2014-08-05

    原文格式PDF

  • 申请/专利权人 CHANG-HWA KIM;RYAN L. BURNS;

    申请/专利号US201213397038

  • 发明设计人 CHANG-HWA KIM;RYAN L. BURNS;

    申请日2012-02-15

  • 分类号H01L21/4763;H01L21/302;

  • 国家 US

  • 入库时间 2022-08-21 16:01:09

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