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Time-delay integration through reduction of delay between subsequent capture operations of a light-detection device

机译:通过减少光检测设备后续捕获操作之间的延迟来进行时延集成

摘要

Disclosed are a system, a method and an apparatus of reduction of delay between subsequent capture operations of a light-detection device. In one embodiment, a light-detection circuit includes an avalanche photodiode implemented in a deep submicron CMOS technology. In addition, the light-detection circuit includes a passive quench control circuit to create an avalanche current that generates a high voltage at an output of a second inverter gate of the circuit. The light-detection circuit further includes an active quench control circuit to reduce a dead time of the circuit. The light-detection circuit also includes a reset circuit to create a low voltage at an output of the second inverter gate and to create an active reset through a PMOS transistor of the light-detection circuit.
机译:公开了一种减少光检测装置的后续捕获操作之间的延迟的系统,方法和设备。在一个实施例中,一种光检测电路包括以深亚微米CMOS技术实现的雪崩光电二极管。另外,光检测电路包括无源失超控制电路,以产生雪崩电流,该雪崩电流在电路的第二反相器栅极的输出处产生高电压。光检测电路还包括有源失超控制电路,以减少电路的死区时间。光检测电路还包括复位电路,以在第二反相器栅极的输出端产生低电压,并通过光检测电路的PMOS晶体管产生有源复位。

著录项

  • 公开/公告号US8586908B2

    专利类型

  • 公开/公告日2013-11-19

    原文格式PDF

  • 申请/专利权人 MUNIR ELDESOUKI;

    申请/专利号US201313779718

  • 发明设计人 MUNIR ELDESOUKI;

    申请日2013-02-27

  • 分类号H01J40/14;H03L5;

  • 国家 US

  • 入库时间 2022-08-21 16:00:54

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