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Memory device and method for dynamic random access memory having serial interface and integral instruction buffer

机译:具有串行接口和集成指令缓冲器的动态随机存取存储器的存储装置和方法

摘要

A dynamic random access memory integrated circuit includes an interface to a serial interconnect, where the interface is configured to receive a plurality of memory access instructions over the serial interconnect, and a buffer configured to store the plurality of memory access instructions prior to execution of the buffered memory access instructions by the dynamic random access memory integrated circuit. The memory access instructions are received over at least one serial link that forms the serial interconnect, and the at least one serial link may be a shared bi-directional serial link or a uni-directional serial link.
机译:一种动态随机存取存储器集成电路,包括到串行互连的接口,其中该接口被配置为通过串行互连接收多个存储器访问指令,以及被配置为在执行串行互连之前存储多个存储器访问指令的缓冲器。由动态随机存取存储器集成电路缓冲的存储器存取指令。通过形成串行互连的至少一个串行链路来接收存储器访问指令,并且该至少一个串行链路可以是共享的双向串行链路或单向串行链路。

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