首页> 外国专利> Method, apparatus and full-system simulator for speeding MMU simulation

Method, apparatus and full-system simulator for speeding MMU simulation

机译:MMU仿真加速方法,装置及全系统仿真器

摘要

A method, apparatus, and full-system simulator for speeding memory management unit simulation with direct address mapping on a host system, the host system supporting a full-system simulator, on which a guest system is simulated, the method comprising the following steps: setting a border in the logical space assigned for the full-system simulator by the host system, thereby dividing the logical space into a safe region and a simulator occupying region; shifting the full-system simulator itself from the occupied original host logical space to the simulator occupying region; and reserving the safe region for use with at least part of the guest system.
机译:一种用于在主机系统上通过直接地址映射来加速存储器管理单元模拟的方法,装置和全系统模拟器,该主机系统支持在其上模拟来宾系统的全系统模拟器,该方法包括以下步骤:在由主机系统分配给整个系统模拟器的逻辑空间中设置边界,从而将逻辑空间划分为安全区域和模拟器占用区域;将整个系统模拟器本身从占用的原始主机逻辑空间转移到模拟器占用的区域;并保留安全区域以供访客系统的至少一部分使用。

著录项

相似文献

  • 专利
  • 外文文献
  • 中文文献
获取专利

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号