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Integrated circuit including cross-coupled transistors with two transistors of different type having gate electrodes formed by common gate level feature with shared diffusion regions on opposite sides of common gate level feature

机译:集成电路,其包括具有两个不同类型的晶体管的交叉耦合的晶体管,所述两个不同类型的晶体管具有由公共栅极电平特征形成的栅电极,并且在公共栅极电平特征的相对侧上具有共享的扩散区域

摘要

A semiconductor device includes first and second p-type diffusion regions, and first and second n-type diffusion regions that are each electrically connected to a common node. Each of a number of conductive features within a gate electrode level region is fabricated from a respective originating rectangular-shaped layout feature, with a centerline of each originating rectangular-shaped layout feature aligned in a parallel manner. The conductive features respectively form gate electrodes of first and second PMOS transistor devices, and first and second NMOS transistor devices. Widths of the first and second p-type diffusion regions are substantially equal, such that the first and second PMOS transistor devices have substantially equal widths. Widths of the first and second n-type diffusion regions are substantially equal, such that the first and second NMOS transistor devices have substantially equal widths. The first and second PMOS and first and second NMOS transistor devices form a cross-coupled transistor configuration.
机译:半导体器件包括第一和第二p型扩散区域以及分别电连接到公共节点的第一和第二n型扩散区域。栅电极级区域内的多个导电特征中的每一个均由各自的始发矩形布局特征制造,每个始发矩形布局特征的中心线以平行方式对准。导电特征分别形成第一PMOS晶体管器件和第二PMOS晶体管器件以及第二NMOS晶体管器件的栅电极。第一和第二p型扩散区域的宽度基本相等,使得第一和第二PMOS晶体管器件具有基本相等的宽度。第一和第二n型扩散区域的宽度基本相等,使得第一和第二NMOS晶体管器件具有基本相等的宽度。第一和第二PMOS以及第一和第二NMOS晶体管器件形成交叉耦合的晶体管配置。

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