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Vertical pillar transistor, DRAM device including the same, method for forming the vertical pillar transistor and method for forming a semiconductor layer
Vertical pillar transistor, DRAM device including the same, method for forming the vertical pillar transistor and method for forming a semiconductor layer
In a semiconductor device and associated methods, the semiconductor device includes a substrate, an insulation layer on the substrate, a conductive structure on the insulation layer, the conductive structure including at least one metal silicide film pattern, a semiconductor pattern on the conductive structure, the semiconductor pattern protruding upwardly from the conductive structure, a gate electrode at least partially enclosing the semiconductor pattern, the gate electrode being spaced apart from the conductive structure, a first impurity region at a lower portion of the semiconductor pattern, and a second impurity region at an upper portion of the semiconductor pattern.
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