SYSTEM ON CHIP, BUS INTERFACE CIRCUIT AND BUS INTERFACE METHOD

摘要

A method and circuit for asynchronous bus interfacing on a system-on-chip. A system on chip according to the present invention includes a first interface configured to transmit a payload to a first transmission rate through a first channel in synchronization with a first clock signal; A payload storage unit connected to the channel and receiving a payload from the first channel, and a payload from the payload storage unit connected to the payload storage unit and synchronized with the second clock signal at the second interface rate through the second channel. A payload receiver for receiving. The length of the second channel is shorter than the length of the first channel, and the first clock signal is asynchronous with the second clock signal. [Selection] Figure 1