SERIAL-PARALLEL CONVERTER CIRCUIT, PARALLEL-SERIAL CONVERTER CIRCUIT, SERIALIZER/DESERIALIZER, AND SEMICONDUCTOR DEVICE
展开▼
机译:串联-并联转换器电路,并联-串联转换器电路,串行化器/解串器和半导体器件
展开▼
页面导航
摘要
著录项
相似文献
摘要
PROBLEM TO BE SOLVED: To realize a serial-parallel converter circuit capable of setting a data width so as to avoid power concentration.;SOLUTION: A serial-parallel converter circuit includes: a plurality of conversion stages 51 to 54 (where K and N are positive integers satisfying KN) each converting input K-bit data to N-bit data and connected such that output data from a front conversion stage serves as the input data to a rear conversion stage; and an output circuit including physically continuous 2M output selection circuits the number of which corresponds to a predetermined number of bits M that are the number of bits of the output data from the last conversion stage of the conversion stages, and selecting either the output data from the last conversion stage of the conversion stages or the output data from the conversion stage before the last stage to output the selected output data, the output data from the conversion stage before the last conversion stage being input to the physically discontinuous output selection circuits of the output circuit.;COPYRIGHT: (C)2015,JPO&INPIT
展开▼
机译:解决的问题:实现一种能够设置数据宽度以避免功率集中的串并转换器电路;解决方案:串并转换器电路包括:多个转换级51至54(其中K和N是满足K M Sup>个输出选择电路的输出电路,其数量对应于预定位数M,该预定位数M是来自转换级的最后转换级的输出数据的位数,然后选择转换阶段最后转换阶段的输出数据或最后阶段之前转换阶段的输出数据以输出所选输出数据,最后转换阶段之前转换阶段的输出数据输入到输出电路中物理上不连续的输出选择电路。;版权:(C)2015,JPO&INPIT
展开▼