首页> 外国专利> METHOD AND APPARATUS FOR ESTIMATING SAMPLING DELAY ERROR BETWEEN FIRST AND SECOND ANALOG-TO-DIGITAL CONVERTERS OF TIME-INTERLEAVED ANALOG-TO-DIGITAL CONVERTER

METHOD AND APPARATUS FOR ESTIMATING SAMPLING DELAY ERROR BETWEEN FIRST AND SECOND ANALOG-TO-DIGITAL CONVERTERS OF TIME-INTERLEAVED ANALOG-TO-DIGITAL CONVERTER

机译:估计时间交错的模数转换器的第一和第二模数转换器之间的采样延迟误差的方法和装置

摘要

A method for estimating a sampling delay error between a first analog-to-digital converter (ADC) and a second ADC in a time-interleaved ADC includes: receiving a first digital output signal and a second digital output signal generated from the first ADC and the second ADC based on a same analog input signal, respectively; determining a delay amount according to a predetermined sampling delay between the first ADC and the second ADC and a delay adjusting value, and applying the delay amount delay to the second digital output signal to generate a delayed digital output signal, wherein the delay adjusting value Td is used to estimate the sampling delay error Te; calculating a difference between the first digital output signal and the delayed digital output signal; and feeding back the difference for adjusting the delay adjusting value Td according to the difference.
机译:一种用于估计时间交错ADC中的第一模数转换器(ADC)和第二ADC之间的采样延迟误差的方法,包括:接收从第一ADC产生的第一数字输出信号和第二数字输出信号,以及第二ADC分别基于相同的模拟输入信号;根据第一ADC和第二ADC之间的预定采样延迟和延迟调整值确定延迟量,并将延迟量延迟应用于第二数字输出信号以产生延迟的数字输出信号,其中,延迟调整值Td用于估计采样延迟误差Te;计算第一数字输出信号与延迟的数字输出信号之间的差;反馈该差值,以根据该差值调整延迟调整值Td。

著录项

  • 公开/公告号US2014368364A1

    专利类型

  • 公开/公告日2014-12-18

    原文格式PDF

  • 申请/专利权人 REALTEK SEMICONDUCTOR CORP.;

    申请/专利号US201414307475

  • 发明设计人 HONG-TA HSU;

    申请日2014-06-17

  • 分类号H03M1/12;H03M1/06;

  • 国家 US

  • 入库时间 2022-08-21 15:24:05

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